- RF and Mixed-mode System IC Design For T-DMB (Territorial Digital Multimedia Broadcasting)
- Digital Broadcasting RF System
- Analog/RF & Mixed-Mode IC Design
- LNA, Mixer, AGC, VCO, Frequency Synthesizer Design
- Clock & Data Recovery Circuit Design
- International Conference Papers
A 330MHz Low Jitter Fast Locking Direct Skew Compensation DLL
Joo-Ho Lee, Seon-Ho Han and Hoi-Jun Yoo
IEEE International Solid State Circuit Conference (ISSCC), pp. 352-353, 2000
The CMOS temperature sensor and cyclic ADC for low power single chip DTCXO
IEEE International Conference on VLSI and CAD (ICVC), pp. 599-601, 1999
-
- High Performace Memory and High-Speed I/O Design for Embedded Memory System
A Low Power Reconfigurable I/O DRAM Macro with Single Bit line Writing Scheme
Jeonghoon Kook and Hoi-Jun Yoo
IEEE Proceedings of the 26th ESSCIRC, pp. 384-387, 2000
- Design of high-performance mixed mode I.C.
A Multichip-on-Oxide 1.0Gb/s 80dBΩ Fully-Differential CMOS Transimpedance Amplifier for Optical Interconnect Applications
Jaeseo Lee, Seong-Jun Song, Sung Min Park, Choong-Mo Nam, Young-Se Kwon, and Hoi-Jun Yoo
IEEE International Solid State Circuit Conference (ISSCC), vol.1, pp. 80-447, 2002
Design and Implementation of CMOS LVDS 2.5Gb/s Transmitter and 1.3Gb/s Receiver for Optical Interconnections
Jaeseo Lee, Jae-Won Lim, Sung-Jun Song, Sung-Sik Song, Wang-Joo Lee and Hoi-Jun Yoo
IEEE International Symposium on Circuits and Systems (ISCAS), Vol. 4, pp. 702-705, 2001
- Domestic Conference Papers
Design and Implementation of CMOS Transeiver for High Speed Interface
Korea Conference on Semiconductors (KCS)
- OLED-driver circuit
- Frequency Synthesizer
2004. 2 M.S. in EE, Korea Advanced Institute of Science and Technology
2002. 2 B.S. in Electrical & Computer Engineering, Hanyang University
- International Journal Papers
A Small Ripple Regulated Charge Pump with Automatic Pumping Control Schemes
Sung-Eun Kim, Seong-Jun Song, Jin Kyung Kim, Sunyoung Kim, Jae-Youl Lee, and Hoi-Jun Yoo
ESSCIRC 2004
CMOS Optical Receiver Chipset for Gigabit Ethernet Applications
Sung-Eun Kim, Seong-Jun Song, Sung Min Park and Hoi-Jun Yoo
IEEE International Symposium on Circuits and Systems (ISCAS), May 2003
2002. 2 B.S. in EE, Korea Advanced Institute of Science and Technology
- Mobile 3D Graphics Library Design
- Cache Architecture in Mobile System
2005. 2 M.S. in EE, Korea Advanced Institute of Science and Technology
2003. 2 B.S. in EE, Kyungpook National University
1996. 2 Taegu Hyup-Sung High School
A Fixed-Point 3D Graphics Library with Energy-Efficient Cache Architecture
Min-Wuk Lee, Byeong-Gyu Nam, Juho Sohn, Namjun Cho, Hyejung Kim, Kwanho Kim and Hoi-Jun Yoo
IEEE International Symposium on Circuits and Systems(ISCAS) 2005
- Open O/S H/W Platform
- 3G Multimedia Mobile Development
2008. 2 M.S. in EE, Korea Advanced Institute of Science and Technology
2006. 2 B.S. in EE, Korea Advanced Institute of Science and Technology
2002. 2 Kyonggi Science High School
Dynamic Voltage and Frequency Scaling (DVFS) Scheme for Multi-Domains Power Management
Jeabin Lee, Byeong-Gyu Nam, and Hoi-Jun Yoo
IEEE Asian Solid-State Circuits Conference(A-SSCC), pp.360-363, Nov. 2007
A Power Management Unit with Continuous Co-Locking of Clock Frequency and Supply Voltage for Dynamic Voltage and Frequency Scaling
Jeabin Lee, Byeong-Gyu Nam, Seong-Jun Song, Namjun Cho and Hoi-Jun Yoo
IEEE International Symposium on Circuits and Systems(ISCAS), May 2007
- Body Sensor Network System and Wearable Computer System
2008. 8 M.S. in EE, Korea Advanced Institute of Science and Technology
2004. 2 B.S. in EE, Korea Advanced Institute of Science and Technology
2002. 2 Seoul Science High School
Electrical Characterization of Screen-Printed Circuits on the Fabric
Yongsang Kim, Hyejung Kim, and Hoi-Jun Yoo
IEEE Transactions on Advanced Packaging (TADVP), Vol.33, No.1, pp.196-205, Feb. 2010
- Network-on-Chip Based SoC Design
- Low Power DSP
2009. 2 M.S. in EE, Korea Advanced Institute of Science and Technology
2007. 2 B.S. in EE, Korea Advanced Institute of Science and Technology
2003. 2 Hansung Science High School
A 54GOPS 51.8mW Analog-Digital Mixed Mode Neural Perception Engine for Fast Object Detection
Minsu Kim, Joo-Young Kim, Seungjin Lee, Jinwook Oh, and Hoi-Jun Yoo
IEEE Custom Integrated Circuits Conference (CICC), Sep. 2009
A 22.8GOPS 2.83mW Neuro-fuzzy Object Detection Engine for Fast Multi-object Recognition
IEEE Symposium on VLSI Circuits (SoVC), June 2009
A 1.55ns 0.015 mm2 64-bit Quad Number Comparator
Minsu Kim, Joo-Young Kim and Hoi-Jun Yoo
International Symposium on VLSI Design, Automation and Test(VLSI-DAT), April 2009
2010. 8 M.S. Student in EE, Korea Advanced Institute of Science and Technology
2008. 2 B.S. in EE, Korea Advanced Institute of Science and Technology
2004. 2 Seoul Science High School
An Energy-Efficient Dual Sampling SAR ADC with Reduced Capacitive DAC
Binhee Kim, Long Yan, Jerald Yoo, Namjun Cho, and Hoi-Jun Yoo
IEEE International Symposium on Circuits and Systems(ISCAS), May 2009
2011. 2 M.S. in EE, Korea Advanced Institute of Science and Technology
2009. 2 B.S. in EE, Korea Advanced Institute of Science and Technology
2005. 2 Hansung Science High School
A 22.4 mW Competitive Fuzzy Edge Detection Processor for Volume Rendering
Joonsoo Kwon, Minsu Kim, Jinwook Oh, and Hoi-Jun Yoo
IEEE International Symposium on Circuit and Systems(ISCAS), Jun. 2010
- Biomedical Processor Design
2015. 9 ~ Ph.D. Student in EE, Korea Advanced Institute of Science and Technology (KAIST)
2015. 8 M.S. in EE, Korea Advanced Institute of Science and Technology (KAIST)
2010. 8 B.S. in Mathematical Sciences, Korea Advanced Institute of Science and Technology (KAIST)
2005. 8 Korea Science Academy of KAIST
2018. 9 M.S. in EE, Korea Advanced Institute of Science and Technology
2016. 8 B.S. Student in EE, Korea Advanced Insititue of Science and Technology
2008. 2 Seoul Science High School
- Low power deep learning and intelligent vision SoC with memory architecture
2019. 8 M.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)
2017. 8 B.S. in EE, Kyunghee University
2014. 2 Yushin High School
Z-PIM: A Sparsity-Aware Processing-in-Memory Architecture With Fully Variable Weight Bit-Precision for Energy-Efficient Deep Neural Networks
Ji-Hoon Kim, Juhyoung Lee, Jinsu Lee, Jaehoon Heo, and Joo-Young Kim
IEEE Journal of Solid-State Circuits (JSSC), Early Access. 2020
An Ultra-low-power Mixed-mode Face Recognition Processor for Always-on User Authentication in Mobile Device
Ji-Hoon Kim, Changhyeon Kim, Kwantae Kim, Juhyung Lee, Hoi-Jun Yoo, and Joo-Young Kim
Journal of Semiconductor Science and Technology (JSTS), Dec. 2020
Z-PIM: An Energy-Efficient Sparsity-Aware Processing-In-Memory Architecture with Fully-Variable Weight Precision
Ji-Hoon Kim, Juhyoung Lee, Jinsu Lee, Hoi-Jun Yoo and Joo-Young Kim
Symposium on VLSI Circuits (SoVC), Jun. 2020
An Ultra-Low-Power Analog-Digital Hybrid CNN Face Recognition Processor Integrated with a CIS for Always-on Mobile Devices
Ji-Hoon Kim, Changhyeon Kim, Kwantae Kim and Hoi-Jun Yoo
IEEE International Symposium on Circuit and Systems (ISCAS), May. 2019
- Biomedical Sensor Front-end
2020. 2 M.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)
2018. 2 B.S. in EE, Korea University
2014. 2 Busan Science High School
FlashMAC: A Time-Frequency Hybrid MAC Architecture With Variable Latency-Aware Scheduling for TinyML Systems
Surin Gweon, Sanghoon Kang, Kwantae Kim, and Hoi-Jun Yoo
IEEE Journal of Solid-State Circuits (JSSC), Jul. 2022
FlashMAC: An Energy-Efficient Analog-Digital Hybrid MAC with Variable Latency-Aware Scheduling
Surin Gweon, Sanghoon Kang, Donghyeon Han, Kyoung-Rog Lee, Kwantae Kim, Hoi-Jun Yoo
IEEE Asian Conference on Solid-State Circuits (ASSCC), Nov. 2021
93.8% Current Efficiency and 0.672 ns Transient Response Reconfigurable LDO for Wireless Sensor Network Systems
Surin Gweon, Jaehyuk Lee, Kwantae Kim, and Hoi-Jun Yoo
- Multicore Processor Architecture
- Deep Learning SoC
2020. 8 M.S. Student in EE, Korea Advanced Insititue of Science and Technology (KAIST)
2018. 7 B.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)
2013. 2 Gyeonggi Science High School
-- International Journal Papers
A 0.22–0.89 mW Low-Power and Highly-Secure Always-on Face Recognition Processor with Adversarial Attack Prevention
Youngwoo Kim, Donghyeon Han, Changhyeon Kim, and Hoi-Jun Yoo
IEEE Transactions on Circuits and Systems II (TCAS-2), May. 2020
-- International Conference Papers
IEEE International Symposium on Circuit and Systems (ISCAS), Oct. 2020
- RISC-V SoC Platform
2021. 9 ~ Ph.D. Student in EE, Korea Advanced Insititue of Science and Technology (KAIST)
2021. 8 M.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)
2019. 7 B.S. in EE, Fudan University
2015. 7 Yanbian No.1 High School
- International Journal Papers
An Efficient Deep-Learning-Based Super-Resolution Accelerating SoC With Heterogeneous Accelerating and Hierarchical Cache
Zhiyong Li, Sangjin Kim, Dongseok Im, Dongheon Han, and Hoi-Jun Yoo
IEEE Journal of Solid-State Circuits (JSSC), Dec. 2022
An Energy-efficient High-quality FHD Super-resolution Mobile Accelerator SoC with Hybrid-precision and Energy-efficient Cache Subsystem
Zhiyong Li, Sangjin Kim, Dongseok Im, Donghyeon Han, and Hoi-Jun Yoo
IEEE Symposium on High Performance Chips (HOT Chips), Aug. 2022
An 0.92 mJ/frame High-quality FHD Super-resolution Mobile Accelerator SoC with Hybrid-precision and Energy-efficient Cache
IEEE Custom Integrated Circuits Conference (CICC), Apr. 2022
A 3.6 TOPS/W Hybrid FP-FXP Deep Learning Processor with Outlier Compensation for Image-to-Image Application
Zhiyong Li, Dongseok Im, Jinsu Lee, and Hoi-jun Yoo
IEEE International Symposium on Circuit and Systems (ISCAS), May. 2021
- Processing-In-Memory (PIM)
- Deep Learning Processor
- Neuromorphic
2022.3 ~ M.S. Student in EE, Korea Advanced Institute of Science and Technology (KAIST)
2022.2 B.S in EE, Sungkyunkwan University
2015.2 Daeryun High School
A 15.9 mW 96.5 fps Memory-Efficient 3D Reconstruction Processor with Dilation-based TSDF Fusion and Block-Projection Cache System
Hankyul Kwon, Gwangtae Park, Junha Ryu, Wooyoung Jo, and Hoi-Jun Yoo
IEEE International Symposium on Circuits and Systems (ISCAS), May. 2023
- Deep Learning SoC Design
2022. 3 ~ M.S. Student in EE, Korea Advanced Insititue of Science and Technology (KAIST)
2022. 2 B.S. in EE, Korea University
2016. 2 Ulsan Science High School
A 92 fps and 2.56 mJ/frame Computing-in-Memory-based Human Pose Estimation Accelerator with Resource-Efficient Macro for Mobile Devices
Beomseok Kwon, Zhiyong Li, Sangjin Kim, Wooyoung Jo, and Hoi-Jun Yoo
IEEE Transactions on Circuits and Systems II (TCAS-II), Mar. 2023
A 92 fps and 2.56 mJ/Frame Computing-in-Memory-Based Human Pose Estimation Accelerator with Resource-Efficient Macro for Mobile Devices
- AI Algorithm
2022.8~ M.S. Student in EE, Korea Advanced Institute of Science and Technology (KAIST)
2022.7 B.S in Microelectronics, Sichuan University
2018.7 Chongqing Hechuan High School
An 2.31uJ/Inference Ultra-Low Power Always-on Event-Driven AI-IoT SoC with Switchable nvSRAM Compute-in-Memory Macro
Haoyang Sang, Wenao Xie, Gwangtae Park, and Hoi-Jun Yoo
IEEE Transactions on Circuits and Systems II (TCAS-II), Mar. 2024
IEEE International Symposium on Circuits and Systems (ISCAS), May. 2024
Address#1233, School of Electrical Engineering, KAIST, 291 Daehak-ro (373-1 Guseong-dong), Yuseong-gu, Daejeon 34141, Republic of Korea Tel +82-42-350-8068 Fax +82-42-350-3410E-mail [email protected]·© SSL. All Rights Reserved.·Design by NSTAR
